Kenji Chen 87d4a201ab broadwell: Configure IOSF Port and Grant Count ... Synchronize the code with FRC. Change-Id: I50d2a02971681bbfcf4135482b5b95a41ddaac36 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: c891a3e0474235bd97268f52d09ddff574caeb95 Original-BUG=None Original-TEST=Build coreboot image and run on Samus to confirm the setting is properly applied. Original-Signed-off-by: Kenji Chen <kenji.chen@intel.com> Original-Change-Id: If387a23749b6e9470c7e67286234e18ab3e423b3 Original-Reviewed-on: https://chromium-review.googlesource.com/219523 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/9208 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2015-04-02 17:27:44 +02:00
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baytrail	baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU	2015-04-02 17:27:28 +02:00
broadwell	broadwell: Configure IOSF Port and Grant Count	2015-04-02 17:27:44 +02:00
common	bootstate: use structure pointers for scheduling callbacks	2015-03-18 16:41:43 +01:00
fsp_baytrail	intel/fsp_baytrail: Add PCI Root Port IRQ Routing	2015-03-12 20:35:49 +01:00
Kconfig	broadwell: Hook into the build system	2014-12-31 21:23:09 +01:00
Makefile.inc	broadwell: Hook into the build system	2014-12-31 21:23:09 +01:00