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include/baseboard
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mb/intel/adlrvp: create dynamic power limits mechanism for thermal
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2021-08-10 21:22:22 +00:00 |
spd
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mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU
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2021-08-13 18:04:02 +00:00 |
variants
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mb/intel/adlrvp_p: Enable TCSS USB ports device path
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2021-09-14 14:04:30 +00:00 |
board_id.c
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board_id.h
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board_info.txt
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bootblock.c
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mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h'
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2021-07-19 18:25:42 +00:00 |
chromeos.c
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chromeos.fmd
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mb/intel/adlrvp: Increase RO/RW region size in chromeos.fmd
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2021-05-03 07:42:51 +00:00 |
devicetree.cb
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soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
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2021-08-28 18:21:26 +00:00 |
devicetree_m.cb
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soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
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2021-08-28 18:21:26 +00:00 |
dsdt.asl
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mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ACPI
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2021-07-05 10:51:32 +00:00 |
early_gpio.c
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mb/intel/adlrvp: Program CPU PCIE RP GPIOs in early GPIO
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2021-05-07 09:32:26 +00:00 |
early_gpio_m.c
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mb/intel/adlrvp_m: Enable CR50 TPM support over SPI
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2021-08-16 14:59:55 +00:00 |
ec.c
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fw_config.c
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mb/intel/adlrvp: Enable I2S audio codecs on ADL-M RVP
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2021-07-21 15:43:16 +00:00 |
gpio.c
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gpio_m.c
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mb/intel/adlrvp_m: Fix TPM IRQ conflict with I2C4
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2021-09-03 16:36:02 +00:00 |
Kconfig
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mb/adlrvp: Add new ADL P board variant for MCHP1727
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2021-09-13 13:59:45 +00:00 |
Kconfig.name
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mb/adlrvp: Add new ADL P board variant for MCHP1727
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2021-09-13 13:59:45 +00:00 |
mainboard.c
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mb/intel/adlrvp: create dynamic power limits mechanism for thermal
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2021-08-10 21:22:22 +00:00 |
Makefile.inc
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mb/intel/adlrvp: create dynamic power limits mechanism for thermal
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2021-08-10 21:22:22 +00:00 |
memory.c
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mb/intel/adlrvp: Add board id for MR DDR5 SKU
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2021-06-14 05:55:30 +00:00 |
ramstage.c
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mb/intel/adlrvp: Clean up the print message
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2021-09-05 19:21:34 +00:00 |
romstage_fsp_params.c
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mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU
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2021-08-13 18:04:02 +00:00 |
smihandler.c
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