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Martin Roth 8bc8be4d0e util/lint/kconfig_lint: change warning levels and text
- Add an exception for MAINBOARD_POWER_ON_AFTER_POWER_FAIL when checking
- With those exceptions set, we don't have anymore #define or #ifdef
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- Change the definition of an unused symbol from a warning to a note.
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- Upgrade the warning for loading Kconfig files multiple times from
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Change-Id: I6dcb06d4f0b099d5ccaf7643e72dd790719bdf58
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16840
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-03 22:05:54 +02:00
3rdparty 3rdparty/blobs: Update to get AGESA binary for pcengines/apu2 2016-08-21 21:20:13 +02:00
Documentation Documentation/Intel/Soc: Update Quark FSP build instructions 2016-09-30 01:18:04 +02:00
payloads payloads/external/Memtest86Plus: Update stable to latest commit 2016-09-26 21:45:32 +02:00
src google/gale/Kconfig: Change wording of Kconfig option 2016-10-03 22:05:10 +02:00
util util/lint/kconfig_lint: change warning levels and text 2016-10-03 22:05:54 +02:00
.checkpatch.conf Update .checkpatch.conf 2016-09-02 18:22:04 +02:00
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.gitignore .gitignore: Add coreinfo build residue, defconfig 2016-09-02 18:20:51 +02:00
.gitmodules git modules: rename git submodules to avoid hierarchies 2016-02-11 20:55:55 +01:00
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MAINTAINERS intel/amenia: Remove Amenia mainboard 2016-09-24 04:24:54 +02:00
Makefile Makefile: Give .ali files an empty recipe 2016-09-20 19:21:07 +02:00
Makefile.inc Build system: Remove IASL_WARNINGS_ARE_ERRORS option 2016-09-22 22:33:55 +02:00
README Remove extra newlines from the end of all coreboot files. 2016-07-31 18:19:33 +02:00
gnat.adc Make Ada a first class citizen 2016-09-19 11:14:18 +02:00
toolchain.inc Add minimal GNAT run time system (RTS) 2016-09-19 11:14:49 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.