coreboot-kgpe-d16/util/inteltool
Nico Huber 94473afcd2 util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs
The P2SB (PCI to Side-Band) bridge is on a different PCI device on APL.
Hence, we have to decide based on the LPC ID which device to query.

Also fix a comment.

Change-Id: Ie20d7d2d246629d085bcf4740ba28b1e81e6a12a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/29896
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-29 21:03:24 +00:00
..
Makefile treewide: use /usr/bin/env where appropriate 2018-11-17 07:32:03 +00:00
ahci.c inteltool/ahci: Don't print reserved, all-zero registers 2017-06-06 17:34:57 +02:00
amb.c
cpu.c util/inteltool: Add Pentium 4 model f6x 2018-06-04 02:31:51 +00:00
description.md util: Add description.md to each util 2018-07-26 13:26:50 +00:00
gfx.c
gpio.c util/inteltool: Fix LynxPoint (non-LP) GPIO register map 2018-10-18 19:42:11 +00:00
gpio_groups.c inteltool: Add some Skylake desktop ids 2018-03-27 15:42:14 +00:00
inteltool.8 Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
inteltool.c util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs 2018-11-29 21:03:24 +00:00
inteltool.h util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs 2018-11-29 21:03:24 +00:00
ivy_memory.c
memory.c inteltool: Add some Skylake desktop ids 2018-03-27 15:42:14 +00:00
pcie.c inteltool: Add some Skylake desktop ids 2018-03-27 15:42:14 +00:00
pcr.c util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs 2018-11-29 21:03:24 +00:00
pcr.h inteltool: Add dumping of full PCR ports 2018-06-11 20:55:06 +00:00
powermgt.c inteltool: Add PCI IDs for the C220 PCH series 2018-06-21 17:39:48 +00:00
rootcmplx.c inteltool: Add PCI IDs for the C220 PCH series 2018-06-21 17:39:48 +00:00
spi.c inteltool: Add PCI IDs for the C220 PCH series 2018-06-21 17:39:48 +00:00