Vaibhav Shankar 8cdeef1c0d mainboard/google/reef: Configure PERST_0 pin ... This configures PERST_0 in devicetree. For boards without PERST_0, the pin should be disabled. For boards with PERST_0 the correct GPIO needs to be assigned. BUG=chrome-os-partner:55877 Change-Id: I705009b480e02b4c9b2070bb4f82cb4d552e9a46 Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Reviewed-on: https://review.coreboot.org/16603 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)		2016-09-14 22:18:15 +02:00
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acpi	src/acpi: Capitalize ACPI and SATA	2016-07-31 19:25:40 +02:00
arch	src/arch: Improve code formatting	2016-09-12 20:05:30 +02:00
commonlib	commonlib: move DIV_ROUND macros from nvidia/tegra	2016-09-07 20:52:42 +02:00
console	src/console: Add required space before opening parenthesis '('	2016-08-31 20:06:20 +02:00
cpu	cpu/amd/family_10h-family_15h: transition away from device_t	2016-09-13 17:25:13 +02:00
device	src/device: Add required space before opening parenthesis '('	2016-08-28 18:27:52 +02:00
drivers	driver/fsp2_0: Include stdint header file in api.h	2016-09-12 19:53:00 +02:00
ec	src/ec: Improve code formatting	2016-09-07 13:55:05 +02:00
include	arch/arm: Add armv7-r configuration	2016-09-12 19:58:43 +02:00
lib	edid: Fix a function signature	2016-09-08 23:19:06 +02:00
mainboard	mainboard/google/reef: Configure PERST_0 pin	2016-09-14 22:18:15 +02:00
northbridge	i945.h: fix #include path	2016-09-13 17:26:21 +02:00
soc	soc/intel/apollolake: Add PM methods to power gate PCIe	2016-09-14 22:17:47 +02:00
southbridge	southbridge/amd/agesa/hudson: transition away from device_t	2016-09-13 17:23:50 +02:00
superio	src/superio: Improve code formatting	2016-09-05 03:07:37 +02:00
vboot	vboot: consolidate google_chromeec_early_init() calls	2016-08-25 22:50:17 +02:00
vendorcode	vendorcode/skylake: Add FSP header files without any adaptations	2016-09-12 19:54:25 +02:00
Kconfig	Kconfig: Relocate DEVICETREE symbol	2016-09-06 22:49:06 +02:00