coreboot-kgpe-d16/src
Jonathan Neuschäfer 90fd0727c7 soc/sifive/fu540: Simplify UART refclk calculation
clock_get_coreclk_khz() already detects whether the PLL or the input
clock (hfclk) is used.

Tested on HiFive Unleashed.

Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-03 13:18:04 +00:00
..
acpi
arch arch/power8: Rename to ppc64 2018-11-30 20:02:17 +00:00
commonlib src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
console (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
cpu sb/intel/i82801gx: Clean up unneeded smi setup code 2018-12-03 10:20:17 +00:00
device arch/power8: Rename to ppc64 2018-11-30 20:02:17 +00:00
drivers drivers/intel/gma: Fix typo in header 2018-11-28 18:33:35 +00:00
ec cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl 2018-11-30 21:52:10 +00:00
include include/device/smbus.h: Don't use device_t 2018-12-03 13:01:15 +00:00
lib src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
mainboard sb/intel/lynxpoint: Move HAVE_SMI_HANDLER to southbridge Kconfig 2018-12-03 13:14:26 +00:00
northbridge nb/intel/gm45: Make fetching the blc_pwm freq global 2018-12-03 13:03:13 +00:00
security tss: implement tlcl_save_state 2018-11-28 18:32:59 +00:00
soc soc/sifive/fu540: Simplify UART refclk calculation 2018-12-03 13:18:04 +00:00
southbridge sb/intel/lynxpoint: Move HAVE_SMI_HANDLER to southbridge Kconfig 2018-12-03 13:14:26 +00:00
superio src: Add required space after "switch" 2018-11-19 08:17:06 +00:00
vendorcode vendorcode/cavium: Supply bdk_pop and bdk_dpop definitions 2018-11-28 11:47:59 +00:00
Kconfig cpu/x86/Kconfig.debug: Move more options here 2018-11-23 08:38:31 +00:00