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coreboot-kgpe-d16/src/soc/intel/braswell
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Shawn Nematbakhsh 3bad4cb086 braswell: acpi: Allow DPTF thresholds to be defined at board-level 
Similar to Skylake, allow braswell mainboards to override the default
DPTF thresholds.

BUG=chrome-os-partner:43884
TEST=Build for Strago
BRANCH=Strago

Change-Id: Id2574e98c444b8bf4da8ca36f3eeeb06568e78e0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 799a7006e8fcacfea8e8e0de5c99c3ce3c4ac34f
Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Change-Id: If69627163237674a28fb8a26b4ce1886e5dbfc17
Original-Reviewed-on: https://chromium-review.googlesource.com/296033
Original-Commit-Ready: Shawn N <shawnn@chromium.org>
Original-Tested-by: Shawn N <shawnn@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/11546
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-09 20:18:23 +00:00
..
acpi braswell: acpi: Allow DPTF thresholds to be defined at board-level 2015-09-09 20:18:23 +00:00
bootblock x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
include/soc braswell: Tristate CFIO 139 and CFIO 140 2015-09-08 11:48:09 +00:00
microcode microcode: Unify rules to add microcode to CBFS once again 2015-09-07 23:51:30 +00:00
romstage fsp raminit: Add romstage_params to soc_memory_init_params 2015-08-29 07:11:34 +00:00
acpi.c Braswell: Update to end of June. 2015-07-06 18:45:23 +02:00
chip.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
chip.h intel/braswell: fix build 2015-07-29 19:26:34 +02:00
cpu.c intel/braswell: allow dirty cache line evictions for SMRAM to stick 2015-08-29 07:10:52 +00:00
elog.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
emmc.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
gfx.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
gpio.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
gpio_support.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
hda.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
iosf.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
Kconfig x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
lpc_init.c Braswell: Update to end of June. 2015-07-06 18:45:23 +02:00
lpe.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
lpss.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
Makefile.inc x86: bootblock: remove linking and program flow from build system 2015-09-09 03:22:58 +00:00
memmap.c intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
northcluster.c intel fsp: remove CHIPSET_RESERVED_MEM_BYTES 2015-07-21 20:09:31 +02:00
pcie.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
placeholders.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
pmutil.c Braswell: Update to end of June. 2015-07-06 18:45:23 +02:00
ramstage.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
sata.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
scc.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
sd.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
smihandler.c braswell: Tristate CFIO 139 and CFIO 140 2015-09-08 11:48:09 +00:00
smm.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
southcluster.c Braswell: Update the ACPI tables 2015-07-06 18:44:38 +02:00
spi.c Drop "See file CREDITS..." comment 2015-09-07 15:54:50 +00:00
spi_loading.c Braswell: Add Braswell SOC support 2015-06-25 21:50:48 +02:00
tsc_freq.c Braswell: Update to end of June. 2015-07-06 18:45:23 +02:00