coreboot-kgpe-d16/src/soc
Kyösti Mälkki 67c48a3677 ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields
After the obsoletion of Processor() it is necessary to provide
_CST package to define P_LVLx IO addresses for C2/C3 transitions.
The latency values from _CST will always replace those in FADT.

Change-Id: I3230be719659fe9cdf9ed6ae73bc91b05093ab97
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-04-21 09:38:26 +00:00
..
amd ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields 2023-04-21 09:38:26 +00:00
cavium treewide: Remove duplicated include <device/pci.h> 2023-02-01 03:03:34 +00:00
example/min86
intel ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields 2023-04-21 09:38:26 +00:00
mediatek soc/mediatek: Add assert for regulator VRF12 2023-04-14 12:09:24 +00:00
nvidia
qualcomm qualcomm/common: Pass FMAX_LIMIT flag for Lazor board to QcLib 2023-03-17 00:34:08 +00:00
rockchip
samsung treewide: Fix old-style declarations 2023-01-17 04:23:49 +00:00
sifive/fu540
ti
ucb/riscv