Julien Viard de Galbert a0e5046a08 soc/intel/denverton_ns: Generate ACPI DMAR Table ... - Write ACPI DMAR Table if VT-d is enabled. - The entries are defined to follow FSP settings. Change-Id: I263b03b96280599266d4c5e193583ecdfe9697b7 Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/25446 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-11-16 12:09:32 +00:00
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amd	soc/amd/common/block: drop double underscores from include guards	2020-11-16 08:12:56 +00:00
cavium	soc/cavium: Drop unneeded empty lines	2020-09-22 17:14:49 +00:00
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	soc/intel/denverton_ns: Generate ACPI DMAR Table	2020-11-16 12:09:32 +00:00
mediatek	soc/mediatek/mt8192: Reserve 44K SRAM for MCUPM working buffer	2020-11-16 11:04:11 +00:00
nvidia	soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tab	2020-11-09 10:31:32 +00:00
qualcomm	mrc_cache: Move code for triggering memory training into mrc_cache	2020-11-13 22:57:50 +00:00
rockchip	src: Change bare 'unsigned' to 'unsigned int'	2020-11-16 11:03:16 +00:00
samsung	src/soc/samsung: Move common headers to "common/include/soc"	2020-10-19 07:11:32 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb