65cc526f6f
Without RELOCATABLE_RAMSTAGE have WB cache large enough to cover the greatest ramstage needs, as there is no benefit of trying to accurately match the actual need. Choose this to be bottom 16MiB. With RELOCATABLE_RAMSTAGE write-back cache of low ram is only useful for bottom 1MiB of RAM as a small part of this gets used during SMP initialisation before proper MTRR setup. Change-Id: Icd5f8461f81ed0e671130f1142641a48d1304f30 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15249 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| acpi | ||
| acpi.c | ||
| bootblock.c | ||
| cache_as_ram.inc | ||
| chip.h | ||
| finalize.c | ||
| Kconfig | ||
| Makefile.inc | ||
| model_206ax.h | ||
| model_206ax_init.c | ||