coreboot-kgpe-d16/src/cpu/intel
Kyösti Mälkki a27fba67a0 intel model_106cx: Include CAR from socket directory
Since the socket layer is implemented with this CPU model, there
could potentially be multiple CPU models included.  There can be
only one cache_as_ram include, so select it directly within
the socket directory.

Change-Id: Ia52bb152276eddfd1fb33ddb7f5d153ab8e8163c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15757
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-22 05:38:38 +02:00
..
car Ignore RAMTOP for MTRRs 2016-06-22 11:03:42 +02:00
common/acpi CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
ep80579 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
fit CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
fsp_model_206ax x86 chipsets: utilize x86_setup_mtrrs_with_detect() 2016-03-08 23:58:01 +01:00
fsp_model_406dx Remove #ifdef checks on Kconfig symbols 2015-12-06 18:46:12 +01:00
haswell intel post-car: Consolidate choose_top_of_stack() 2016-07-10 11:16:07 +02:00
hyperthreading CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
microcode cpu/intel/microcode: allow microcode to be loaded in romstage 2016-02-10 18:08:28 +01:00
model_6bx tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_6dx CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_6ex Ignore RAMTOP for MTRRs 2016-06-22 11:03:42 +02:00
model_6fx tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_6xx CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_65x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_67x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_68x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_69x cpu: microcode: Use microcode stored in binary format 2015-09-30 06:57:19 +00:00
model_106cx intel model_106cx: Include CAR from socket directory 2016-07-22 05:38:38 +02:00
model_206ax Ignore RAMTOP for MTRRs 2016-06-22 11:03:42 +02:00
model_1067x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
model_2065x Ignore RAMTOP for MTRRs 2016-06-22 11:03:42 +02:00
model_f0x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f1x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f2x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f3x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
model_f4x CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
slot_1 intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:39:47 +02:00
slot_2 CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
smm/gen1 CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
socket_441 intel model_106cx: Include CAR from socket directory 2016-07-22 05:38:38 +02:00
socket_BGA956 intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:49:12 +02:00
socket_BGA1284 cpu/intel: Add socket BGA1284 2015-11-10 00:19:01 +01:00
socket_FC_PGA370 intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:39:47 +02:00
socket_FCBGA559 intel model_106cx: Include CAR from socket directory 2016-07-22 05:38:38 +02:00
socket_LGA771 intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:49:12 +02:00
socket_LGA775 intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:49:12 +02:00
socket_LGA1155 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mFCBGA479 intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:39:47 +02:00
socket_mFCPGA478 intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:49:12 +02:00
socket_mPGA478 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mPGA479M intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:39:47 +02:00
socket_mPGA603 cpu: get rid of socket source code 2015-05-04 22:18:23 +02:00
socket_mPGA604 intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:43:20 +02:00
socket_PGA370 intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-21 00:39:47 +02:00
socket_rPGA988B Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig 2015-08-25 17:36:45 +00:00
socket_rPGA989 Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig 2015-08-25 17:36:45 +00:00
speedstep tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
thermal_monitoring CPU/intel: Add missing license headers 2016-02-14 22:45:15 +01:00
turbo tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Kconfig cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx 2015-11-24 14:39:42 +01:00
Makefile.inc Make MRC vs native a config rather than making a separate chipset for it. 2016-02-12 17:09:05 +01:00