Angel Pons 0c0d49229d soc/intel: Replace open-coded buffer length calculation ... Use `sizeof(value)` instead of manually calculating the buffer size. Change-Id: Ibe49e40b1c4f2c0b661d94e59059a95bdb204197 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>		2021-04-21 14:21:44 +00:00
..
acpi	soc/intel: Include gfx.asl from northbridge	2021-03-01 08:32:47 +00:00
bootblock	soc/intel: Drop bootblock_cpu_init() function	2021-03-01 19:43:04 +00:00
include/soc	soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h	2021-03-27 04:23:12 +00:00
romstage	soc/intel: Hook up SOC_INTEL_DISABLE_IGD to InternalGfx UPD	2021-04-08 06:47:02 +00:00
spd
acpi.c	soc/intel: Factor out identical acpigen GPIO helpers	2021-03-01 19:37:56 +00:00
chip.c	soc/intel: Replace open-coded buffer length calculation	2021-04-21 14:21:44 +00:00
chip.h	soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC	2021-04-21 09:19:58 +00:00
cpu.c
dptf.c	dptf: Move platform-specific information to struct dptf_platform_info	2021-04-13 08:22:49 +00:00
elog.c
espi.c
finalize.c
fsp_params.c
gpio.c
gspi.c
i2c.c
Kconfig	soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC	2021-04-21 09:19:58 +00:00
lockdown.c
Makefile.inc	soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c	2021-04-21 09:17:40 +00:00
me.c
meminit.c	spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()	2021-03-17 08:10:35 +00:00
p2sb.c
pmc.c	soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c	2021-04-21 09:17:40 +00:00
pmutil.c	soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c	2021-04-21 09:17:40 +00:00
reset.c
sd.c
smihandler.c
spi.c
systemagent.c
uart.c	soc/intel/*: drop UART pad configuration from common code	2021-03-12 08:48:03 +00:00
xhci.c