Angel Pons f5ec52a522 nb/intel/haswell: Move USB config API into Lynx Point ... Both EHCI and xHCI USB controllers are inside the PCH (southbridge). Now that mainboard USB configuration no longer depends on pei_data.h definitions, the API declarations can be placed in southbridge code. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: Ia21991b225482b33c5bc0dc52884674d301b28ba Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2021-03-25 07:51:50 +00:00
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amd	sb/amd/agesa/hudson/lpc: Remove space between function and signature	2021-02-25 10:04:01 +00:00
intel	nb/intel/haswell: Move USB config API into Lynx Point	2021-03-25 07:51:50 +00:00
ricoh/rl5c476	src/southbridge: Drop unneeded empty lines	2020-09-21 16:29:35 +00:00
ti	sb/ti/pcixx12: Remove NOOP chip driver	2021-03-05 10:58:33 +00:00