Angel Pons 6bd99f9ada soc/intel/skylake: Clean up SD GPIO handling ... This is to align with newer platforms. Change-Id: If33ea3a7835ec071be3fd060f9712c47678bd6bf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50963 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-01 19:37:36 +00:00
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baseboard	mb/*,soc/intel: drop the obsolete dt option speed_shift_enable	2020-10-26 06:51:42 +00:00
rvp3	soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig	2020-11-13 17:32:37 +00:00
rvp7	soc/intel/skylake: Clean up SD GPIO handling	2021-03-01 19:37:36 +00:00
rvp8	soc/intel/skylake: Clean up SD GPIO handling	2021-03-01 19:37:36 +00:00
rvp11	mb/intel/kblrvp: do UART pad configuration at board-level	2021-01-21 19:01:58 +00:00