coreboot-kgpe-d16/src/soc
Usha P aaf28d2507 soc/intel/apollolake: Display platform information
This patch includes the change required to display Apollo Lake platform
information which reports CPU, MCH, PCH and IGD information in romstage.

BUG=None
TEST=
1. Boot to OS on Bobba board.
2. Verified below info from CPU Console log in romstage
CPU: Intel(R) Celeron(R) N4000 CPU @ 1.10GHz
CPU: ID 706a1, Geminilake B0, ucode: 00000031
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 31f0 (rev 03) is Geminilake
PCH: device id 3197 (rev 03) is Geminilake
IGD: device id 3185 (rev 03) is Geminilake EU12

Change-Id: Id4edfeae7faee9f5f80698cf34b31fdcb066a813
Signed-off-by: Usha P <usha.p@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38824
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-02 11:37:13 +00:00
..
amd soc/amd/common/block/include/amdblocks: Fix typos 2020-02-24 13:01:03 +00:00
cavium
intel soc/intel/apollolake: Display platform information 2020-03-02 11:37:13 +00:00
mediatek treewide: capitalize 'USB' 2020-02-26 17:06:40 +00:00
nvidia
qualcomm sc7180: clock: Fix QUP DFSR configuration for perf levels 2020-02-07 23:12:00 +00:00
rockchip soc/rockchip: Fix typos 2020-02-24 13:04:02 +00:00
samsung soc/{samsung,sifive}: Fix typos 2020-02-24 13:01:15 +00:00
sifive soc/{samsung,sifive}: Fix typos 2020-02-24 13:01:15 +00:00
ucb