Brandon Breitenstein ae1548621a soc/cannonlake: Enable SMM code for Cannon Lake ... The minimum needed defines are included here and pm.h will be updated when the PMC code for cannonlake is uploaded. Change-Id: Idaf2be1258b3ec71fa449b88516bcb06c730d776 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/20849 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2017-08-11 16:04:42 +00:00
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bootblock	soc/intel/cannonlake: Add memory map support	2017-08-07 17:53:13 +00:00
include/soc	soc/cannonlake: Enable SMM code for Cannon Lake	2017-08-11 16:04:42 +00:00
romstage	Update files with no newline at the end	2017-07-24 15:08:16 +00:00
cbmem.c	soc/intel/cannonlake: Add initial dummy directory	2017-06-29 14:50:38 +00:00
gpio.c	soc/intel/cannonlake: Correct gpio definition	2017-07-27 15:50:36 +00:00
Kconfig	soc/cannonlake: Enable SMM code for Cannon Lake	2017-08-11 16:04:42 +00:00
Makefile.inc	soc/intel/cannonlake: Add ramstage SystemAgent support	2017-08-09 20:06:27 +00:00
memmap.c	soc/intel/cannonlake: Add memory map support	2017-08-07 17:53:13 +00:00
reset.c	soc/intel/cannonlake: Add reset.c	2017-07-13 21:04:47 +00:00
smihandler.c	soc/cannonlake: Enable SMM code for Cannon Lake	2017-08-11 16:04:42 +00:00
systemagent.c	soc/intel/cannonlake: Add ramstage SystemAgent support	2017-08-09 20:06:27 +00:00
uart.c	Revert "soc/intel/cannonlake: Add postcar stage support"	2017-07-21 17:39:10 +00:00