Angel Pons ae999503f6 nb/intel/haswell/pcie.c: Add missing pre-ASPM init ... Add devicetree configuration parameters for mainboard-specific settings, and provide reasonable defaults, which should usually be good enough. This is based on Haswell SA Reference Code version 1.9.0 (Nov 2014). Tested on Asrock B85M Pro4, registers now have the expected values. Change-Id: I0dcdd4ca431c2ae1e62f2719c376d8bdef3054bd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47223 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-10 10:08:45 +00:00
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common	nb/intel/common/fixed_bars.h: Add casts to uintptr_t	2021-02-12 07:52:37 +00:00
e7505	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
gm45	nb/intel: Add missing <types.h>	2021-02-16 20:56:56 +00:00
haswell	nb/intel/haswell/pcie.c: Add missing pre-ASPM init	2021-03-10 10:08:45 +00:00
i440bx	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
i945	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00
ironlake	nb/intel/ironlake: Avoid casting pointers to structs	2021-02-27 09:39:28 +00:00
pineview	nb/intel/pineview: Drop unused GPIO32 macro	2021-02-18 10:14:56 +00:00
sandybridge	nb/intel/sandybridge: Clean up dram_timing function	2021-03-01 08:31:44 +00:00
x4x	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00