coreboot-kgpe-d16/src/northbridge/intel/x4x
Arthur Heymans b238caaaca device/device.c: Rename .disable to .vga_disable
This makes it clear what this function pointer is used for.

Change-Id: I2090e164edee513e05a9409d6c7d18c2cdeb8662
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51009
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-24 11:28:16 +00:00
..
acpi nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:54 +00:00
registers
acpi.c nb/intel/x4x: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:44 +00:00
bootblock.c nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h> 2021-02-04 10:21:06 +00:00
chip.h
dq_dqs.c nb/intel/x4x: Constify write leveling arrays 2021-02-07 22:36:57 +00:00
early_init.c nb/intel/x4x,sandybridge: Move romstage_handoff_init() call 2021-02-23 02:35:53 +00:00
gma.c device/device.c: Rename .disable to .vga_disable 2021-02-24 11:28:16 +00:00
Kconfig nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:54 +00:00
Makefile.inc
memmap.c nb/intel: Add missing <types.h> 2021-02-16 20:56:56 +00:00
memmap.h nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:54 +00:00
northbridge.c nb/intel/x4x: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:44 +00:00
raminit.c nb/intel/x4x: Use a variable for s3resume 2021-02-23 02:36:55 +00:00
raminit.h
raminit_ddr23.c nb/intel/x4x: Correct DDR3 turnaround table 2021-02-10 07:20:38 +00:00
raminit_tables.c nb/intel/x4x: Clean up cosmetics of raminit tables 2021-02-07 21:56:11 +00:00
rcven.c nb/intel/x4x: Reset DQS probe on all channels 2021-01-15 11:20:18 +00:00
romstage.c nb/intel/x4x,sandybridge: Move romstage_handoff_init() call 2021-02-23 02:35:53 +00:00
x4x.h nb/intel/x4x,sandybridge: Move romstage_handoff_init() call 2021-02-23 02:35:53 +00:00