coreboot-kgpe-d16/src/northbridge/intel/i440bx
Julius Werner baf27dbaeb cbfs: Enable CBFS mcache on most chipsets
This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is
enabled by default. Some older chipsets with insufficient SRAM/CAR space
still have it explicitly disabled. All others get the new section added
to their memlayout... 8K seems like a sane default to start with.

Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-12-02 22:12:10 +00:00
..
acpi nb/intel/i440bx: Make ROM area unavailable for MMIO 2020-08-04 07:14:43 +00:00
debug.c device/smbus_host: Declare common early SMBus prototypes 2020-06-22 11:53:31 +00:00
i440bx.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
Makefile.inc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
memmap.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
northbridge.c nb/intel/i440bx: add resources during read_resources() 2020-05-14 21:25:38 +00:00
raminit.c device/smbus_host: Declare common early SMBus prototypes 2020-06-22 11:53:31 +00:00
raminit.h nb/intel/i440bx: Drop mainboard_enable_serial() 2020-05-12 19:37:35 +00:00
romstage.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00