coreboot-kgpe-d16/src/soc/intel/fsp_baytrail/microcode
Werner Zeh b5a374d58b fsp_baytrail: Add new microcode for Bay Trail M
Add a new microcode for Bay Trail M D0 stepping used
in cpu N2807 silicon.
In addition, a selection of the used CPU type has
been added (I or M/D) which allows to use only the
really needed microcode for a given CPU type.

Change-Id: I373fc9b535f1dc97eaa9f76ae46f0b69b247a8a0
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/8399
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-05 12:45:10 +01:00
..
Makefile.inc FSP platform microcode: Update to remove Kconfig variable 2014-12-05 21:40:12 +01:00
microcode_blob.c fsp_baytrail: Add new microcode for Bay Trail M 2015-03-05 12:45:10 +01:00
microcode_size.h fsp_baytrail: Add new microcode for Bay Trail M 2015-03-05 12:45:10 +01:00