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coreboot-kgpe-d16/src/soc/intel/fsp_baytrail
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Patrick Georgi 56b830938a build system: rename __BOOT_BLOCK__ and __VER_STAGE__ 
Drop the inner underscore for consistency. Follows the
commit stated below.

Change-Id: I75cde6e2cd55d2c0fbb5a2d125c359d91e14cf6d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Based-on-Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06
Based-on-Signed-off-by: Julius Werner <jwerner@chromium.org>
Based-on-Reviewed-on: https://chromium-review.googlesource.com/219172
Reviewed-on: http://review.coreboot.org/9290
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2015-04-04 20:07:18 +02:00
..
acpi intel/fsp_baytrail: Add PCI Root Port IRQ Routing 2015-03-12 20:35:49 +01:00
baytrail build system: rename __BOOT_BLOCK__ and __VER_STAGE__ 2015-04-04 20:07:18 +02:00
bootblock x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
fsp fsp_baytrail: Get FSP reserved memory from the FSP HOB list 2015-02-09 17:44:31 +01:00
microcode fsp_baytrail: Add new microcode for Bay Trail M 2015-03-05 12:45:10 +01:00
romstage x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
acpi.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
chip.c {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol 2014-11-01 21:14:35 +01:00
chip.h fsp_baytrail: remove register option for TSEG size 2014-12-05 16:23:08 +01:00
cpu.c intel/fsp_baytrail: add new CPUID for Baytrail I step D0 2014-11-24 14:40:18 +01:00
gpio.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
i2c.c fsp_baytrail: Add I2C driver 2015-03-05 14:19:34 +01:00
iosf.c coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
Kconfig fsp_baytrail: Add new microcode for Bay Trail M 2015-03-05 12:45:10 +01:00
Makefile.inc fsp_baytrail: Add I2C driver 2015-03-05 14:19:34 +01:00
memmap.c coreboot: fix munged license text 2015-03-09 02:32:19 +01:00
northcluster.c fsp_baytrail: Get FSP reserved memory from the FSP HOB list 2015-02-09 17:44:31 +01:00
nvm.c Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'" 2015-01-06 11:19:28 +01:00
placeholders.c fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip 2014-05-29 23:10:36 +02:00
pmutil.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
ramstage.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
reset.c fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip 2014-05-29 23:10:36 +02:00
smihandler.c intel/fsp_baytrail: Spelling fixes 2014-12-08 05:40:01 +01:00
smm.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
southcluster.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
spi.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
tsc_freq.c intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module added 2014-10-09 22:09:25 +02:00