cfb1bf2275
This reverts commit d510b60f5b.
This patch includes the DSDT ASL code for shadowmountain board.
BUG=b:175808146
TEST= Boot shadowmountain board, dump and verify the DSDT ASL entries.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I5aa60730fc9b93fa97b2bafbb8b2714b6b37becc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
43 lines
973 B
Text
43 lines
973 B
Text
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi.h>
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#include <baseboard/ec.h>
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#include <baseboard/gpio.h>
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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ACPI_DSDT_REV_2,
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OEM_ID,
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ACPI_TABLE_CREATOR,
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0x20110725 // OEM revision
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)
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{
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#include <acpi/dsdt_top.asl>
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#include <soc/intel/common/block/acpi/acpi/platform.asl>
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/* global NVS and variables */
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#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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{
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#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
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#include <soc/intel/alderlake/acpi/southbridge.asl>
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#include <soc/intel/alderlake/acpi/tcss.asl>
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}
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}
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/* Chrome OS Embedded Controller */
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Scope (\_SB.PCI0.LPCB)
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{
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// ACPI code for EC SuperIO functions
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#include <ec/google/chromeec/acpi/superio.asl>
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// ACPI code for EC functions
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#include <ec/google/chromeec/acpi/ec.asl>
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}
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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}
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