Felix Singer bd7020d68c soc/intel/skylake: Restore alphabetical order of Kconfig selects ... Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I6a5c694a9686a5435aa5c64647286a6017f9aa13 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48376 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-08 20:50:13 +00:00
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amd	soc/amd/picasso: drop unused cpu/amd/mtrr from Makefile	2020-12-06 20:10:11 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	soc/intel/skylake: Restore alphabetical order of Kconfig selects	2020-12-08 20:50:13 +00:00
mediatek	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
nvidia	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
qualcomm	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
rockchip	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
samsung	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
sifive	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ti	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ucb