Lin Huang bdd06de15d rockchip/rk3399: initialize apll_b ... coreboot boots from the little core, and doesn't use the big core for now, but if apll_b is set to the default 24MHz, it will take a long time to enable the big core. This will cause a watchdog crash, so apll_b initialization to 600MHz needs to be done in coreboot. BRANCH=none BUG=chrome-os-partner:54817 TEST=Pick CL:353762 and see big CPU clocks look right TEST=Boot from Gru and see no cpufreq warnings Change-Id: Ie45cd2271555942e4321e9a9e523dc10f63d8107 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: Original-Change-Id: I20b8b591db3171e27740d85edce11f9e8797d849 Original-Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Original-Commit-Id: 16bc916174042620bebe19ae73d241002491aecc Original-Original-Change-Id: Id3487138b383b6643ba7e3ce1eae501a6622da10 Original-Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Original-Signed-off-by: Douglas Anderson <dianders@chromium.org> Original-Original-Reviewed-on: https://chromium-review.googlesource.com/356399 Original-Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/15583 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>		2016-07-12 00:27:52 +02:00
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broadcom/cygnus	soc/*: fix uart's regwidth specification in cbtables	2016-02-21 12:26:05 +01:00
dmp/vortex86ex	dmp/vortex86ex: Merge northbridge and southbridge into soc	2016-05-05 20:06:33 +02:00
imgtec/pistachio	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
intel	intel post-car: Consolidate choose_top_of_stack()	2016-07-10 11:16:07 +02:00
marvell	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
mediatek/mt8173	soc: Remove newline from CHIP_NAME	2016-07-07 17:14:01 +02:00
nvidia	tegra124: Build verstage when CHROMEOS is selected	2016-07-07 17:10:51 +02:00
qualcomm	Gale board: Move TPM setup function to verstage.c	2016-06-02 00:19:11 +02:00
rdc/r8610	rdc/r8610: Move to src/soc	2016-05-05 20:08:58 +02:00
rockchip	rockchip/rk3399: initialize apll_b	2016-07-12 00:27:52 +02:00
samsung	region: Add writeat and eraseat support	2016-06-24 20:48:12 +02:00
ucb/riscv	tree: drop last paragraph of GPL copyright header	2015-10-31 21:37:39 +01:00