coreboot-kgpe-d16/src
Shelley Chen bf00401e8a mb/google/poppy/variants/nami: Add field to identify single channel DDR
Variants of Nami need to accommodate single channel DDR.  Will use
GPP_D10 on nami for identification.  GPP_D10 will return 1 when device
is using single channel DDR and 0 when using dual channel DDR.

BUG=b:117194353
BRANCH=None
TEST=dmidecode | grep Channel and make sure that the correct number of
     channels gets returned.

Change-Id: If86ab2c5404c4e818ce496ea935227ab5e51730a
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/29233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-29 16:49:43 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch arch/x86/acpi: Add TPM2 table support 2018-10-26 11:22:58 +00:00
commonlib src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
console console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS 2018-10-18 12:50:41 +00:00
cpu cpu/intel/smm: Don't make assumptions on TSEG_SIZE 2018-10-24 10:04:17 +00:00
device src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
drivers src/drivers/pc80/tpm/tis.c: Dont use port value when invalid. 2018-10-29 14:27:16 +00:00
ec ec/google/chromeec: Use common MEC interface 2018-10-18 15:01:40 +00:00
include selfboot: create selfboot_check function, remove check param 2018-10-25 16:57:51 +00:00
lib selfboot: create selfboot_check function, remove check param 2018-10-25 16:57:51 +00:00
mainboard mb/google/poppy/variants/nami: Add field to identify single channel DDR 2018-10-29 16:49:43 +00:00
northbridge nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardware 2018-10-24 10:04:41 +00:00
security vboot: fix CONFIG_RESUME_PATH_SAME_AS_BOOT S3 resume logic 2018-10-24 09:07:43 +00:00
soc tegra210_lp0: make sure to build with compiler.h included 2018-10-29 08:40:37 +00:00
southbridge sb/amd: Use 'unsigned int' to bare use of 'unsigned' 2018-10-24 10:01:55 +00:00
superio src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
vendorcode vendorcode/intel/fsp/icelake: Add icelake FSP header file template 2018-10-26 11:21:05 +00:00
Kconfig src/Kconfig: Drop a superfluous word 2018-10-01 15:28:47 +00:00