coreboot-kgpe-d16/src/soc/intel
Aaron Durbin bff8c5ec19 soc/intel/common/lpss_i2c: fix NULL dereference in error path
If the SoC clock speed is not supported there is supposed to
be an error printed. However, the value printed was wrong which
was dereferencing a NULL struct. Fix that.

Change-Id: I5021ad8c1581d1935b39875ffa3aa00b594c537a
Found-by: Coverity Scan #1365977
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17468
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-11-19 16:55:52 +01:00
..
apollolake soc/intel/apollolake: Enable and Lock AES feature register 2016-11-17 15:18:47 +01:00
baytrail intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
braswell intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE 2016-11-08 19:16:24 +01:00
broadwell intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
common soc/intel/common/lpss_i2c: fix NULL dereference in error path 2016-11-19 16:55:52 +01:00
fsp_baytrail intel/fsp_baytrail: Fix assignment of PcdeMMCBootMode 2016-11-16 18:23:11 +01:00
fsp_broadwell_de soc/intel/fsp_broadwell_de: Fix system hang when timestamp is enabled 2016-10-09 19:08:07 +02:00
quark soc/intel/quark: Fix FSP 2.0 build 2016-09-30 01:16:51 +02:00
sch src/soc: Remove unnecessary whitespace before "\n" and "\t" 2016-08-28 18:25:14 +02:00
skylake skylake: Update the thermal time window for throttling action 2016-11-14 17:20:38 +01:00