coreboot-kgpe-d16/src/cpu
Raul E Rangel c5160986cf cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMI
This change will allow the SMI handler to write to the cbmem console
buffer. Normally SMIs can only be debugged using some kind of serial
port (UART). By storing the SMI logs into cbmem we can debug SMIs using
`cbmem -1`. Now that these logs are available to the OS we could also
verify there were no errors in the SMI handler.

Since SMM can write to all of DRAM, we can't trust any pointers
provided by cbmem after the OS has booted. For this reason we store the
cbmem console pointer as part of the SMM runtime parameters. The cbmem
console is implemented as a circular buffer so it will never write
outside of this area.

BUG=b:221231786
TEST=Boot non-serial FW with DEBUG_SMI and verified SMI messages are
visible when running `cbmem -1`. Perform a suspend/resume cycle and
verify new SMI events are written to the cbmem console log.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ia1e310a12ca2f54210ccfaee58807cb808cfff79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-03-09 14:26:26 +00:00
..
amd cpu,mb,nb,soc: use HPET_BASE_ADDRESS instead of magic number 2022-02-25 17:44:45 +00:00
armltd
intel timestamps: Rename timestamps to make names more consistent 2022-03-08 16:06:33 +00:00
power9 src/cpu/power9: add file structure for power9, implement SCOM access 2022-02-11 13:53:29 +00:00
qemu-power8 src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
qemu-x86 cpu/x86/lapic: Move LAPIC configuration to MP init 2022-02-05 07:59:04 +00:00
x86 cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMI 2022-03-09 14:26:26 +00:00
Kconfig src/cpu: Remove unused symbols 2021-02-18 10:11:24 +00:00
Makefile.inc src/cpu/power9: add file structure for power9, implement SCOM access 2022-02-11 13:53:29 +00:00