Felix Held c8dfd6d935 soc/amd/genoa/acpi/soc: add root bridges to DSDT ... Add the 4 root bridge devices using the ROOT_BRIDGE macro. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If405a90981e5c1fea51935c520800a245473317e Reviewed-on: https://review.coreboot.org/c/coreboot/+/79467 Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2023-12-13 20:32:11 +00:00
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amd	soc/amd/genoa/acpi/soc: add root bridges to DSDT	2023-12-13 20:32:11 +00:00
cavium	Revert "Kconfig: Bring HEAP_SIZE to a common, large value"	2023-11-07 17:35:39 +00:00
example/min86	soc: Remove SOC_SPECIFIC_OPTIONS	2023-08-21 23:45:43 +00:00
intel	soc/intel/meteorlake: Add entries to eventLog on invocation of early SOL	2023-12-11 05:09:38 +00:00
mediatek	soc/mediatek/mt8188: devapc: Allow APU to access BND_NORTH_APB2_S	2023-12-04 16:48:33 +00:00
nvidia	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
qualcomm	qualcomm/sc7180: Move QCSDI and increase romstage size by 4KB	2023-11-18 00:41:53 +00:00
rockchip	fmap: Map less space in fallback path without CBFS verification	2023-11-13 14:19:01 +00:00
samsung	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
sifive/fu540	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
ti
ucb/riscv