Nico Huber ca74f8fe0e cpu/x86/mtrr.h: Clean up some guards ... Move #includes to the top and remove unnecessary guards. Hopefully this prevents future surprises. Change-Id: Id4571c46a0c05a080b2b1cfec64b4eda07d793bb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26761 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-06-04 08:22:45 +00:00
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acpi	arch/x86: Add common AMD ACPI hardware definitions	2017-11-10 19:15:38 +00:00
arch	arch/x86: Introduce postcar_frame_add_romcache()	2018-06-04 08:20:35 +00:00
commonlib	src/commonlib/storage: Move include <console.h> to sd_mmc.h	2018-06-04 02:40:08 +00:00
console	src/console/vtxprintf.c: Remove unneeded 'console.h' include	2018-06-04 02:40:38 +00:00
cpu	intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE	2018-06-02 22:00:01 +00:00
device	device: Move find_dev_path() to device_const.c	2018-05-25 02:45:17 +00:00
drivers	drivers/intel/wifi: Add PCI ID for Intel TP2 Wi-Fi	2018-06-01 12:47:40 +00:00
ec	ec/google/chromeec: Initialize SMI mask in google_chromeec_events_init	2018-06-01 12:47:17 +00:00
include	cpu/x86/mtrr.h: Clean up some guards	2018-06-04 08:22:45 +00:00
lib	lib/cbfs: Optimise LZMA away from romstage	2018-06-04 08:19:44 +00:00
mainboard	mb/google/kahlee: Remove #include <soc/smi.h>	2018-06-03 16:00:55 +00:00
northbridge	nb/intel: Use postcar_frame_add_romcache()	2018-06-04 08:21:56 +00:00
security	security/vboot: Remove redundent _verstage/_everstage/_verstage_size symbols	2018-05-14 16:24:28 +00:00
soc	soc/{amd,intel}: Use postcar_frame_add_romcache()	2018-06-04 08:22:20 +00:00
southbridge	sb/intel/i82801gx: Remove unneeded includes	2018-06-04 02:46:46 +00:00
superio	superio/nuvoton/npcd378: Add PSU fan control	2018-06-01 11:57:25 +00:00
vendorcode	Remove leftover AMD CIMX RD890 vendorcode	2018-05-24 13:21:32 +00:00
Kconfig	cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE	2018-05-31 15:08:48 +00:00