cc4ca5ec94
This patch updates the MTLRVP debug flash layout to optimize WP_RO to 4MB. Changes for chromeos.fmd: SI_BIOS: RW_SECTION_A/B: Increase to 7.5MB. RW_LEGACY: Introduce with 1MB. RW_MISC: Increased to 1MB. RW_UNUSED: 2MB (reserved) WP_RO: Reduce to 4MB Additionally, ensure RW_SECTION_B region starts at 16MB boundary in the SPI Flash. BUG=b:277143384 TEST=Able to build and boot intel/mtlrvp with FSP release and debug image. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ie635e3cce1c3fd771e6a17e4b3c1bd700f4729bd Reviewed-on: https://review.coreboot.org/c/coreboot/+/74254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> |
||
---|---|---|
.. | ||
acpi | ||
arch | ||
commonlib | ||
console | ||
cpu | ||
device | ||
drivers | ||
ec | ||
include | ||
lib | ||
mainboard | ||
northbridge | ||
sbom | ||
security | ||
soc | ||
southbridge | ||
superio | ||
vendorcode | ||
Kconfig |