coreboot-kgpe-d16/src
David Hendricks cd4c8c1e0e exynos5/snow: remove wait_ms arg from dp_controller_init()
This removes the wait_ms argument from the dp_controller_init(). The
only delay involved is a constant 60ms delay that happens if
everything else goes well. This delay is derived from the LCD spec
so there's no reason it should be baked into the controller code.

(This patch also has the side-effect of fixing a bug where we were
delaying on an undefined value for wait_ms).

Change-Id: I03aa19f2ac2f720524fcb7c795e10cc57f0a226e
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3078
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-13 05:12:18 +02:00
..
arch Exynos5250: add a microsecond timer 2013-04-13 00:47:27 +02:00
console console: Make use of CONFIG_USE_OPTION_TABLE 2013-04-01 20:54:48 +02:00
cpu exynos5/snow: remove wait_ms arg from dp_controller_init() 2013-04-13 05:12:18 +02:00
device Add PXE ROM selection to Kconfig menu 2013-04-03 18:01:44 +02:00
drivers [2/2] tps65090: re-factor for coreboot 2013-04-10 17:34:19 +02:00
ec ec/google: Isolate EC bus protocol implementation. 2013-04-12 04:57:39 +02:00
include Exynos5250: add a microsecond timer 2013-04-13 00:47:27 +02:00
lib Fix read_option invocation in uart8250mem.c 2013-04-08 21:36:01 +02:00
mainboard exynos5/snow: remove wait_ms arg from dp_controller_init() 2013-04-13 05:12:18 +02:00
northbridge Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region" 2013-04-12 11:48:15 +02:00
southbridge AMD RS780, SR5650: PcieTrainPort: Fix typo *i*gnoring in comment 2013-04-11 22:04:20 +02:00
superio Add new superio device 2013-04-12 00:37:34 +02:00
vendorcode chromeos: honor MOCK_TPM=1 2013-04-01 23:26:17 +02:00
Kconfig dynamic cbmem: fix memconsole and timestamps 2013-03-23 19:44:25 +01:00