Shaunak Saha cd9e1e423f intel/apollolake: Update gnvs for dptf ... This patch updates dptf variable in gnvs based on device configuration by reading the device tree structure. BUG=chrome-os-partner:53096 TEST=Verify that the thermal zones are enumerated under /sys/class/thermal in Amenia and Reef board. Navigate to /sys/class/thermal, and verify that a thermal zone of type TCPU exists there. Change-Id: I8ab34cdc94d8cdc840b02347569a9f07688e92cd Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/15620 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-07-28 20:13:34 +02:00
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apollolake	intel/apollolake: Update gnvs for dptf	2016-07-28 20:13:34 +02:00
baytrail	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	2016-07-28 00:36:22 +02:00
braswell	soc/intel/braswell: use common Intel ACPI hardware definitions	2016-07-15 08:32:09 +02:00
broadwell	soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv	2016-07-28 00:41:40 +02:00
common	intel/common: Add ASL code for DPTF	2016-07-28 20:09:58 +02:00
fsp_baytrail	soc/intel/fsp_baytrail: use common Intel ACPI hardware definitions	2016-07-15 08:33:03 +02:00
fsp_broadwell_de	soc/intel/fsp_broadwell_de: use common Intel ACPI hardware definitions	2016-07-15 08:32:35 +02:00
quark	cpu/x86: Support CPUs without rdmsr/wrmsr instructions	2016-07-27 13:50:11 +02:00
sch	intel/sch: Merge northbridge and southbridge in src/soc	2016-05-17 21:38:17 +02:00
skylake	intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init	2016-07-28 05:29:46 +02:00