d00d682670
If IGD PCI device is disabled: 1. BAR for the device will be 0. 2. There is no need to allocate framebuffer for this device. Some early SOCs don't have GFX model fuse by default hence we need to add a check to ensure PCI device is enable. This code to avoid die inside coreboot for missing resources. Change-Id: Ic31d3e57ba730f6b569bf2cc3bdc54cb369b8caf Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
||
---|---|---|
.. | ||
amd | ||
broadcom/cygnus | ||
dmp/vortex86ex | ||
imgtec/pistachio | ||
intel | ||
lowrisc/lowrisc | ||
marvell/mvmap2315 | ||
mediatek/mt8173 | ||
nvidia | ||
qualcomm | ||
rockchip | ||
samsung | ||
ucb/riscv |