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coreboot-kgpe-d16/src/soc/intel
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Subrata Banik d0def39413 intel/skylake: IRQ programming through UPD 
Implemented Device IRQ porgramming, PxRC to IRQ mapping,
GPIO IRQ routing, SCI IRQ select through UPD

BUG=NONE
BRANCH=NONE
CQ-DEPEND=CL:*232948
TEST= build and booted sklrvp,kunimitsu with this changes.

Change-Id: Ic98074491fe5251a48ed55b6fb7ef31809c3abf3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 534bd65e5df8654d745c8efe491a332336c9cdc3
Original-Change-Id: I4ea6f3cdb15d371c6023bfd046f3475290f5aa26
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/291403
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12146
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27 15:16:02 +01:00
..
baytrail cpu/mtrr.h: Fix macro names for MTRR registers 2015-10-15 03:52:49 +00:00
braswell cpu/mtrr.h: Fix macro names for MTRR registers 2015-10-15 03:52:49 +00:00
broadwell Intel: Move MCRS ResourceTemplate outside of _CRS method 2015-10-23 22:32:11 +02:00
common fsp/intel common: Add support for Gfx PEIM (AKA GOP) 2015-10-27 15:15:15 +01:00
fsp_baytrail intel/fsp_baytrail: Fix logging of ISPEnable option 2015-10-23 22:20:10 +02:00
skylake intel/skylake: IRQ programming through UPD 2015-10-27 15:16:02 +01:00