coreboot-kgpe-d16/src/mainboard/asrock/h81m-hds
Tristan Corrick d3f01b21fa sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports
The H81 chipset is the only non-LP Lynx Point chipset with 6 PCIe root
ports, all others have 8 [1]. The existing PCIe code assumed that all
non-LP chipsets had 8 root ports, which meant that port 6 would not be
considered the last root port on H81, so `root_port_commit_config()`
would not run. Ultimately, while PCIe still worked on H81, all the root
ports would remain enabled, even if disabled in the devicetree.

Also, remove `PCI_DEVICE_ID_INTEL_LYNXPOINT_MOB_DESK_{MIN,MAX}`, as they
are unused, and the MAX constant is incorrect.

Interestingly, this fixes an issue where GRUB is unable to halt the
system.

Tested on an ASRock H81M-HDS. The root ports disabled in the devicetree
do indeed end up disabled.

[1] Intel® 8 Series/C220 Series Chipset Family Platform Controller Hub
    (PCH) Datasheet, revision 003, document number 328904.

Change-Id: If3ce217e8a4f4ea4e111e4525b03dbbfc63f92b0
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30077
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-28 12:22:35 +00:00
..
acpi
acpi_tables.c
board_info.txt
cmos.default
cmos.layout mb/asrock/h81m-hds: Allow "keep state" for power_on_after_fail 2018-12-19 05:26:58 +00:00
data.vbt
devicetree.cb sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports 2018-12-28 12:22:35 +00:00
dsdt.asl cpu/intel/common: Use a common acpi/cpu.asl file 2018-11-30 22:02:35 +00:00
gma-mainboard.ads
gpio.h
hda_verb.c
Kconfig sb/intel/lynxpoint: Move HAVE_SMI_HANDLER to southbridge Kconfig 2018-12-03 13:14:26 +00:00
Kconfig.name
mainboard.c
Makefile.inc
romstage.c