coreboot-kgpe-d16/src/soc
Felix Held 020d4b605e soc/amd/genoa/domain: generate SSDT entries for domains
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iadc37f2724a9be43cad1f1934403ebabd5cca245
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-12-14 13:05:41 +00:00
..
amd soc/amd/genoa/domain: generate SSDT entries for domains 2023-12-14 13:05:41 +00:00
cavium Revert "Kconfig: Bring HEAP_SIZE to a common, large value" 2023-11-07 17:35:39 +00:00
example/min86 soc: Remove SOC_SPECIFIC_OPTIONS 2023-08-21 23:45:43 +00:00
intel vc/intel/raptorlake: Updating the FSP v4301.01 headers to Standard path 2023-12-14 03:23:31 +00:00
mediatek soc/mediatek/mt8188: devapc: Allow APU to access BND_NORTH_APB2_S 2023-12-04 16:48:33 +00:00
nvidia memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
qualcomm qualcomm/sc7180: Move QCSDI and increase romstage size by 4KB 2023-11-18 00:41:53 +00:00
rockchip fmap: Map less space in fallback path without CBFS verification 2023-11-13 14:19:01 +00:00
samsung memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
sifive/fu540 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
ti
ucb/riscv