coreboot-kgpe-d16

History

Stefan Reinauer 853263b963 copy_and_run.c is not needed twice, and it is used on non-car too. So move it to src/arch/i386/lib/cbfs_and_run.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2010-04-09 10:43:49 +00:00
..
chip.h	Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912	2009-09-30 14:46:43 +00:00
cmos.layout	Replace dual_core and quad_core CMOS (nvram) options with multi_core. Fix some white space.	2010-04-08 15:06:44 +00:00
devicetree.cb	Kconfig builds all boards now.	2010-01-06 09:14:08 +00:00
get_bus_conf.c	dualcore.h and quadcore.h are almost exactly the same.	2010-03-29 14:45:36 +00:00
irq_tables.c	move amd K8/Fam10 "bus detection" function prototypes to a common place.	2010-04-07 15:30:11 +00:00
Kconfig	- unify use of SB_HT_CHAIN_UNITID_OFFSET_ONLY	2010-04-07 00:38:09 +00:00
mainboard.c	Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912	2009-09-30 14:46:43 +00:00
mb_sysconf.h	Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912	2009-09-30 14:46:43 +00:00
mptable.c	move amd K8/Fam10 "bus detection" function prototypes to a common place.	2010-04-07 15:30:11 +00:00
README	Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912	2009-09-30 14:46:43 +00:00
resourcemap.c	Define some variables that were not defined. There are a couple left.	2009-10-26 15:14:07 +00:00
romstage.c	copy_and_run.c is not needed twice, and it is used on non-car too.	2010-04-09 10:43:49 +00:00
spd_addr.h	janitor task: unify and cleanup naming.	2010-02-08 12:20:50 +00:00

README


There are a number of outstanding issues:

* we don't have the mc_patch_01000086.h CPU ucode file yet which is
referenced in a comment in src/mainboard/supermicro/h8dmr_fam10/Options.lb.
AMD has not released it yet. This is not a problem specific to this port.

* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
disappears. This is probably not a problem related to this port specifically.

* setting CONFIG_DEFAULT_CONSOLE_LOGLEVEL lower than 8 simply hangs the boot
shortly after the warm reset triggered by the MCP55 code. I think this too
might be a toolchain problem (but I see it on gcc 3.4 as well as 4.3).

* during startup, the CPU cores talk through each other on serial for a
while. Again, not an issue specific to this port.

* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.

See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html

Ward, 2009-09-22

mansoor@iwavesystems.com said, about the last issue:

  Try enabling CONFIG_XIP_ROM_BASE.  It solved the same problem for me in my board.

So, that's a todo.