c3198543b6
This patch is to provide an additional read LPC pci offset register BIOS_CONTROL (BC) - offset 0xDC to ensure that the last write is successful. Change-Id: I308c0622d348fc96c410a04ab4081bb6af98e874 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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amd | ||
broadcom/cygnus | ||
dmp/vortex86ex | ||
imgtec/pistachio | ||
intel | ||
lowrisc/lowrisc | ||
marvell/mvmap2315 | ||
mediatek/mt8173 | ||
nvidia | ||
qualcomm | ||
rockchip | ||
samsung | ||
ucb/riscv |