Arthur Heymans 485c0ad078 inteltool: Add Cougar- and Pantherpoint PCH PCI IDs for SPI ... Tested to display the register content correctly on a Lenovo Thinkpad X220. Change-Id: I8b65302ed52d4ef1a31bf0cdd9208b368eb7ad67 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2018-02-06 16:11:45 +00:00
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Makefile	inteltool: Dump Sunrise Point PCH-H GPIO groups	2018-01-15 01:18:36 +00:00
ahci.c	inteltool/ahci: Don't print reserved, all-zero registers	2017-06-06 17:34:57 +02:00
amb.c	util/inteltool: fix memory leak	2016-07-31 19:16:45 +02:00
cpu.c	util/inteltool: Remove duplicated error message, switch to snprintf	2017-08-22 10:10:34 +00:00
gfx.c	tree: drop last paragraph of GPL copyright header	2015-10-31 21:37:39 +01:00
gpio.c	inteltool: Dump Sunrise Point PCH-H GPIO groups	2018-01-15 01:18:36 +00:00
gpio_groups.c	inteltool: Dump Sunrise Point PCH-H GPIO groups	2018-01-15 01:18:36 +00:00
inteltool.8	Use more secure HTTPS URLs for coreboot sites	2017-06-07 12:04:50 +02:00
inteltool.c	inteltool: Support for nasty Primary to Sideband Bridge (P2SB)	2018-01-15 01:18:05 +00:00
inteltool.h	inteltool: Dump Sunrise Point PCH-H GPIO groups	2018-01-15 01:18:36 +00:00
ivy_memory.c	util/inteltool: Remove unnecessary whitespace	2016-10-20 20:22:05 +02:00
memory.c	util/inteltool: Add Skylake Desktop Northbridge	2018-01-10 22:04:33 +00:00
pcie.c	util/inteltool: Add Skylake Desktop Northbridge	2018-01-10 22:04:33 +00:00
pcr.c	inteltool: Support for nasty Primary to Sideband Bridge (P2SB)	2018-01-15 01:18:05 +00:00
pcr.h	inteltool: Support for nasty Primary to Sideband Bridge (P2SB)	2018-01-15 01:18:05 +00:00
powermgt.c	inteltool: Add support for Skylake PMC	2017-07-15 22:33:14 +00:00
rootcmplx.c	util/inteltool: Add support for Wildcat Point-LP Premium	2017-05-01 00:43:52 +02:00
spi.c	inteltool: Add Cougar- and Pantherpoint PCH PCI IDs for SPI	2018-02-06 16:11:45 +00:00