Xavi Drudis Ferran e80ce0a134 Improving BKDG implementation of P-states, ... CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. Add to init_fidvid_stage2 some step for my CPU (rev C3) mentioned in BKDG 2.4.2.6 (5) that was missing Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2011-02-28 03:12:00 +00:00
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agesa_wrapper	This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code.	2011-02-14 18:35:15 +00:00
amdfam10	Improving BKDG implementation of P-states,	2011-02-28 00:18:43 +00:00
amdht	Improving BKDG implementation of P-states,	2011-02-28 03:12:00 +00:00
amdk8	Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS	2011-02-24 14:35:42 +00:00
amdmct	Improving BKDG implementation of P-states,	2011-02-28 03:02:40 +00:00
gx1	We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic.	2010-12-13 19:50:25 +00:00
gx2	Add a GX2 Kconfig option to choose the framebuffer size.	2011-01-19 07:25:26 +00:00
lx	Use die() to assure the processor can't wake up from an interrupt.	2010-12-30 19:21:08 +00:00
Kconfig	Add 300 MHz and 500 MHz HT frequency limits	2011-02-27 02:48:41 +00:00
Makefile.inc	This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code.	2011-02-14 18:35:15 +00:00