coreboot-kgpe-d16/Documentation/Intel
Lee Leahy e9a6d1a813 Documentation: x86 shadow ROM disable
Add documentation on disabling the SPI flash which is mapped (shadowed)
into the x86 address space at 0x000e0000 - 0x000fffff.

TEST=None

Change-Id: I1d94d84c6cade97886a3274a7e7403f7b3275c5a
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14112
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-21 19:47:06 +01:00
..
Board Documentation/Intel: Making a bootable SD card 2016-03-07 04:16:55 +01:00
SoC Documentation: x86 shadow ROM disable 2016-03-21 19:47:06 +01:00
development.html Documentation: x86 shadow ROM disable 2016-03-21 19:47:06 +01:00
fsp1_1.html Documentation: x86 Enable Serial Output 2016-02-05 22:57:03 +01:00
index.html Documentation/Intel: More CorebootPayloadPkg documentation 2016-02-29 04:59:26 +01:00