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coreboot-kgpe-d16/src/soc
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Michał Żygowski ed4bc980fa soc/intel/common/block/acpi/northbridge.asl: Reserve SBREG BAR 
Reserve SBREG BAR if it is outside of the PCH reserved memory range.
Desktop series processors have larger SBREG BARs, which, unlike mobile
processors, do not fall into the standard PCH reserved range
(0xfc800000 - 0xfe7fffff). Create a separate reservation for such a case. There is no telling what could happen if the reservation is not
made in ACPI.

TEST=Boot Windows 11 and Ubuntu 22.04 on MSI PRO Z690-A DDR4

Change-Id: Ibaf45daba37e3acfcea0e653df69fa5c2f480c4a
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77445
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-10-16 08:30:37 +00:00
..
amd soc/amd/genoa/include/data_fabric: add VGA decode enable register 2023-10-12 23:14:17 +00:00
cavium Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
example/min86 soc: Remove SOC_SPECIFIC_OPTIONS 2023-08-21 23:45:43 +00:00
intel soc/intel/common/block/acpi/northbridge.asl: Reserve SBREG BAR 2023-10-16 08:30:37 +00:00
mediatek memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
nvidia memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
qualcomm Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
rockchip memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
samsung memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
sifive/fu540 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
ti
ucb/riscv