Felix Held f09221c033 soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS ... This option will make the ramstage MTRR core set the additional bits in the fixed MTRRs that need to be set on AMD CPUs to enable caching. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I94bca61acfc6e38a6d808eb5020537b4e8596178 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-01-24 18:16:09 +00:00
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amd	soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS	2021-01-24 18:16:09 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
intel	soc/intel/xeon_sp/cpx: Account for 'rc' heap manager	2021-01-24 15:54:22 +00:00
mediatek	soc/mediatek/mt8192: pmic: Set efuses manually	2021-01-22 14:26:08 +00:00
nvidia	soc/nvidia/tegra124/spi.c: Remove repeated word	2021-01-18 07:35:02 +00:00
qualcomm	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
rockchip	drivers: Replace set_vbe_mode_info_valid	2020-12-17 06:21:56 +00:00
samsung	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
sifive	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ti	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00