Chris Wang 386b084ee1 mb/google/kahlee: Enable 2T mode for liara in DVT phase ... Change the board id detection to support rev5, since the 2T mode still needed in DVT build. BUG=b:116082728 TEST=verify by ODM. Change-Id: Ibb4cc1fd2bb54984cb7a8856ed7b9f49b78eddce Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/29779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2018-11-23 21:52:28 +00:00
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bootblock	mainboard/google/kahlee: Add support for Dediprog em100	2018-07-16 07:41:51 +00:00
variants	mb: Set coreboot as DSDT's manufacturer model ID	2018-11-23 11:00:40 +00:00
acpi_tables.c
BiosCallOuts.c	mainboard/google/kahlee: Remove Kahlee variant	2018-06-11 08:41:44 +00:00
board_info.txt
chromeos.c	mainboard: Remove unneeded include <console/console.h>	2018-11-05 09:01:13 +00:00
dsdt.asl	mb: Set coreboot as DSDT's manufacturer model ID	2018-11-23 11:00:40 +00:00
ec.c
irq_tables.c	mb/google/kahlee/irq_tables.c: Prefer using '"%s...", __func__'	2018-10-25 16:51:08 +00:00
Kconfig	mb/google/kahlee: Add delan variant	2018-10-10 16:27:27 +00:00
Kconfig.name	mb/google/kahlee: Add delan variant	2018-10-10 16:27:27 +00:00
mainboard.c	amd/stoneyridge: Rename GppClkCntrl fields	2018-10-12 15:16:23 +00:00
Makefile.inc
mptable.c	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
OemCustomize.c	mb/google/kahlee: Enable 2T mode for liara in DVT phase	2018-11-23 21:52:28 +00:00
romstage.c	Move compiler.h to commonlib	2018-10-08 16:57:27 +00:00
smihandler.c	mainboard/google/kahlee: Enable backlight in SMI APMC	2018-07-17 01:57:34 +00:00