Siyuan Wang f3b86b3136 AMD agesa: add enable cache at the end of disable_cache_as_ram ... add this code according to src/include/cpu/x86/cache.h ,line 92, functin enable_cache() Change-Id: Ida96a98397eeed98dd61ca979e8c5a33bf00f9e5 Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com> Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/1662 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>		2012-11-02 21:04:28 +01:00
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arch/x86	Drop get_smbios_data from chip_operations	2012-10-29 23:48:11 +01:00
boot	Fix compilation without CONFIG_WRITE_HIGH_TABLES.	2012-10-02 19:52:07 +02:00
console	Add a capability for mainboard-specific posting.	2012-08-04 19:31:20 +02:00
cpu	AMD agesa: add enable cache at the end of disable_cache_as_ram	2012-11-02 21:04:28 +01:00
devices	Hide all _ROM_RUN Kconfig options if the payload is SeaBIOS	2012-10-29 09:36:18 +01:00
drivers	Take care of NULL chip_ops->name	2012-10-27 02:52:15 +02:00
ec	Auto-declare chip_operations	2012-08-22 05:06:41 +02:00
include	Merge cpu/intel/acpi.h into cpu/intel/speedstep.h	2012-11-01 22:21:12 +01:00
lib	USBDEBUG: retry harder for slow devices	2012-07-30 20:54:24 +02:00
mainboard	Merge cpu/intel/acpi.h into cpu/intel/speedstep.h	2012-11-01 22:21:12 +01:00
northbridge	Fix some issues with new "reference" toolchain	2012-11-02 18:06:49 +01:00
southbridge	Fix some issues with new "reference" toolchain	2012-11-02 18:06:49 +01:00
superio	Remove chip.h files without config structure	2012-10-07 12:55:04 +02:00
vendorcode	Fix ExecuteFinalHltInstruction function in f15h family code	2012-10-30 05:49:13 +01:00
Kconfig	Update SeaBIOS stable to the release-1.7.1 commit	2012-10-16 03:31:05 +02:00
Kconfig.deprecated_options	Unify ID_SECTION_OFFSET and mark it deprecated	2012-01-18 11:21:39 +01:00