coreboot-kgpe-d16/src/soc/intel
Furquan Shaikh f4dac8ac06 commonlib/region: Rename XLATE region device init macro
This makes the name consistent with other region device init macros.

Change-Id: I248894ba6c85326b615dcb71e8f498bc8be50911
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15277
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-21 20:09:34 +02:00
..
apollolake commonlib/region: Rename XLATE region device init macro 2016-06-21 20:09:34 +02:00
baytrail intel cache_as_ram: Fix typo in comment 2016-06-18 19:59:38 +02:00
braswell soc/intel: indicate to build system that XIP_ROM_SIZE isn't used 2016-05-06 16:50:00 +02:00
broadwell intel/broadwell: Remove old USBDEBUG backup store in CAR 2016-06-19 05:21:50 +02:00
common lpss_i2c: Set SDA hold and support custom speed config 2016-06-21 19:32:24 +02:00
fsp_baytrail intel/fsp_baytrail/i2c: mask i2c interrupts in i2c_init() 2016-06-03 04:54:32 +02:00
fsp_broadwell_de soc/intel/fsp_broadwell_de: convert to using common MP init 2016-05-06 16:41:01 +02:00
quark soc/intel/quark: Add C bootblock 2016-06-12 14:52:44 +02:00
sch intel/sch: Merge northbridge and southbridge in src/soc 2016-05-17 21:38:17 +02:00
skylake intel/skylake: Run spi_init as early as possible in ramstage 2016-06-21 19:54:23 +02:00