Subrata Banik f5c3e29bdf ec/google/chromeec/acpi: Make OperationRegion brace align ... Inject TAB to make OperationRegion closing brace align with opening brace. Change-Id: Idb9f23cf6a2c249fb1fd02f4a2ac314d4f7e180b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>		2020-12-01 08:00:23 +00:00
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acpi	ACPI: Define acpi_get_preferred_pm_profile()	2020-11-19 22:58:41 +00:00
arch	arch/x86/smbios: Update SMBIOS type 16 error correction type	2020-11-25 09:18:04 +00:00
commonlib	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
console	console: Override uart base address	2020-11-09 07:46:10 +00:00
cpu	Makefile.inc: Move adding mcu FIT entries	2020-11-27 09:18:20 +00:00
device	device: Drop unused HyperTransport code	2020-11-25 09:11:46 +00:00
drivers	drivers/intel/fsp2_0: Remove console in weak function	2020-11-30 08:09:13 +00:00
ec	ec/google/chromeec/acpi: Make OperationRegion brace align	2020-12-01 08:00:23 +00:00
include	include/device/pci_ids.h: Fix device id for gspi2	2020-11-30 08:07:00 +00:00
lib	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
mainboard	mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVP	2020-12-01 08:00:09 +00:00
northbridge	nb/amd: Deduplicate nb_common.h	2020-11-25 09:11:58 +00:00
security	cbfs: Add metadata cache	2020-11-21 10:43:53 +00:00
soc	soc/intel/skylake: Fix comment	2020-11-30 22:20:46 +00:00
southbridge	soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONF	2020-11-30 16:27:52 +00:00
superio	superio/smsc/sio1036: Support 16-bit IO port addressing	2020-11-18 13:12:11 +00:00
vendorcode	vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11	2020-11-26 18:10:47 +00:00
Kconfig	soc/intel/xeon_sp: Move function debug macros	2020-10-29 16:44:19 +00:00