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coreboot-kgpe-d16/src/mainboard/google
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Aaron Durbin f8bd1dd43c mainboard/google/reef: clear normal MRC cache on recovery retrain 
For Chrome OS the normal MRC cache should be cleared when a hardware
retrain recovery request is observed. The reason is that since there
are 2 different MRC cache slots there needs to be a mechanism which
allows an end user make a system bootable again if the MRC settings
happen to not allow the system to boot any longer. Therefore, one
just needs to enter recovery with the hardware retrain flag and
the system normal MRC cache slot will be invalidated.

BUG=chrome-os-partner:60592
BRANCH=reef

Change-Id: I6ad32ed0dd217d66404b77467a88689a06044544
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17871
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-12-15 23:12:16 +01:00
..
auron cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
auron_paine cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
beltino google/beltino, tidus: simplify led_power_on() function 2016-12-08 14:25:31 +01:00
butterfly cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
chell mainboard & southbridge: Clear files that are just headers 2016-12-05 19:20:49 +01:00
cosmos Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
cyan cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
daisy Kconfig: Prefix hex defaults with 0x 2016-09-30 23:57:02 +02:00
enguarde cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
eve google/eve: Configure I2C3 pins as GPIO inputs 2016-12-14 01:46:05 +01:00
foster vendorcode/google/chromeos: Fill in firmware ID regions 2016-12-13 19:45:49 +01:00
gale google/gale: Remove #ifdef of Kconfig bool symbol 2016-10-03 22:53:44 +02:00
glados mainboard & southbridge: Clear files that are just headers 2016-12-05 19:20:49 +01:00
gru Bob: Update the memory ramid of bob 2016-12-06 22:15:45 +01:00
guado cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
jecht cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
lars mainboard & southbridge: Clear files that are just headers 2016-12-05 19:20:49 +01:00
link cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
ninja cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
nyan google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_big google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_blaze google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
oak mb/google/oak: replace symbolic links 2016-11-30 00:21:53 +01:00
parrot cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
peach_pit Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
purin Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
rambi cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
reef mainboard/google/reef: clear normal MRC cache on recovery retrain 2016-12-15 23:12:16 +01:00
rikku cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
rotor vendorcode/google/chromeos: Fill in firmware ID regions 2016-12-13 19:45:49 +01:00
samus cpu/cpu.h: Drop excessive includes 2016-12-06 20:54:06 +01:00
slippy cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
smaug google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
storm qualcomm/storm: Add required files to enable elog in ramstage 2016-07-28 00:38:25 +02:00
stout cpu/x86/msr.h: Drop excessive includes 2016-12-06 20:54:31 +01:00
tidus google/beltino, tidus: simplify led_power_on() function 2016-12-08 14:25:31 +01:00
urara Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
veyron vendorcode/google/chromeos: Fill in firmware ID regions 2016-12-13 19:45:49 +01:00
veyron_mickey vendorcode/google/chromeos: Fill in firmware ID regions 2016-12-13 19:45:49 +01:00
veyron_rialto google/veyron_rialto: Add lpddr3-K4E6E304EB-2GB-1CH memory configuration 2016-10-06 21:49:06 +02:00
Kconfig
Kconfig.name