coreboot-kgpe-d16/src/soc
Edward O'Callaghan fa043c4e9d soc/intel/cannonlake: Plumb TetonGlacierMode into dt
The following plumbs through the enabling of Intel's TetonGlacierMode
allows for reconfiguring the PCIe lanes at runtime for hybrid drives
to be accessable via devicetree.

BUG=b:149171631
BRANCH=none
TEST=Swap between x4 NVMe drives and 2x2 Teton Glacier hybrid drives and
run lsblk, lspci, and nvme tools to confirm dynamic PCIe configuration
on Puff.

Change-Id: Id9a72161494db6a4da4abd3302b06df7c70634ab
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-28 03:28:30 +00:00
..
amd soc/amd/common/block/include/amdblocks: Fix typos 2020-02-24 13:01:03 +00:00
cavium soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h> 2019-12-19 05:38:43 +00:00
intel soc/intel/cannonlake: Plumb TetonGlacierMode into dt 2020-02-28 03:28:30 +00:00
mediatek treewide: capitalize 'USB' 2020-02-26 17:06:40 +00:00
nvidia commonlib: Add commonlib/bsd 2020-01-28 06:36:13 +00:00
qualcomm sc7180: clock: Fix QUP DFSR configuration for perf levels 2020-02-07 23:12:00 +00:00
rockchip soc/rockchip: Fix typos 2020-02-24 13:04:02 +00:00
samsung soc/{samsung,sifive}: Fix typos 2020-02-24 13:01:15 +00:00
sifive soc/{samsung,sifive}: Fix typos 2020-02-24 13:01:15 +00:00
ucb mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. 2019-12-06 15:09:48 +00:00