coreboot-kgpe-d16/src/soc/intel/baytrail
Shawn Nematbakhsh fb494d68ff baytrail: gpio: Add support for direct / dedicated IRQs
Add support for DirectIRQ / dedicated IRQs. This consists of up to 16
IRQs for both SCORE and SSUS banks.

BUG=chrome-os-partner:22863
TEST=Manual on Rambi. Set some pins to GPIO_DIRQ, and then verify DIRQ
regwrites w/ GPIO_DEBUG look correct.

Change-Id: I4b0dc6e7ae86c9f554b6e78792239234f702764c
Reviewed-on: https://chromium-review.googlesource.com/176165
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4962
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-06 18:40:04 +02:00
..
acpi baytrail: Add ACPI CPU entries 2014-05-06 18:39:04 +02:00
baytrail baytrail: gpio: Add support for direct / dedicated IRQs 2014-05-06 18:40:04 +02:00
bootblock baytrail: load microcode in bootblock 2014-02-05 05:24:13 +01:00
microcode baytrail: Add microcode/punit release 31a 2014-05-06 18:39:10 +02:00
romstage baytrail: add support for S3 resume 2014-05-06 17:17:05 +02:00
acpi.c baytrail: fix fadt structure for gpe0 block 2014-05-06 18:39:16 +02:00
chip.c baytrail: add support for disabling south cluster pci devices 2014-02-27 06:12:43 +01:00
chip.h baytrail: Add EHCI initialization 2014-03-11 19:55:30 +01:00
cpu.c baytrail: Enable Turbo/Burst and set some magic MSRs 2014-05-06 17:20:07 +02:00
ehci.c baytrail: Add EHCI initialization 2014-03-11 19:55:30 +01:00
gfx.c baytrail: Switch graphics init to use reg_script 2014-03-11 19:52:06 +01:00
gpio.c baytrail: gpio: Add support for direct / dedicated IRQs 2014-05-06 18:40:04 +02:00
iosf.c baytrail: add ccu iosf access functions 2014-03-11 19:54:04 +01:00
Kconfig Move ARCH_* from board/Kconfig to cpu or soc Kconfig. 2014-05-03 00:25:20 +02:00
lpe.c baytrail: add audio clock workaround for LPE 2014-03-11 19:54:58 +01:00
Makefile.inc baytrail: Enable Turbo/Burst and set some magic MSRs 2014-05-06 17:20:07 +02:00
memmap.c baytrail: SMM support 2014-02-16 20:57:14 +01:00
mrc_cache.c
northcluster.c baytrail: Add function to read top of low memory 2014-04-30 23:11:21 +02:00
nvm.c
placeholders.c baytrail: Add ACPI CPU entries 2014-05-06 18:39:04 +02:00
pmutil.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
ramstage.c baytrail: Add BCLK and IACORE to pattrs 2014-05-06 18:38:58 +02:00
refcode.c baytrail: use version 2 of efi wrapper 2014-02-24 18:42:52 +01:00
reset.c baytrail: add reset support 2014-02-11 22:22:25 +01:00
sata.c baytrail: Add SATA driver 2014-02-27 06:13:30 +01:00
smihandler.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
smm.c baytrail: add GPIO SMI support 2014-05-06 18:39:29 +02:00
southcluster.c baytrail: configure acpi SCI irq 2014-05-06 17:17:40 +02:00
spi.c
tsc_freq.c baytrail: Add BCLK and IACORE to pattrs 2014-05-06 18:38:58 +02:00
xhci.c baytrail: Fix XHCI problems and re-enable 2014-04-30 23:08:35 +02:00